The field of the disclosure relates generally to power module assemblies and, more particularly, to an internal bus structure of a power module.
Conventional semiconductor power modules typically route signals via traces formed from a direct bond or active metal brazed copper or aluminum on a ceramic substrate. In such configurations, the traces are single layer and are required to be adjacent to one another on a planar surface (e.g., surface of the ceramic substrate). A plurality of semiconductor devices disposed across the module are wire bonded to the metal traces and to a bus bar to electrically couple the semiconductor devices to the module's main power terminals.
Such conventional power modules have attempted to reduce power loop commutation inductance via various configurations of internal layout routing on the substrate or within the side walls of the package. A typical approach is an optimization of a length and a width of the metal traces and an orientation of the semiconductor devices. In addition, bus bar structures having a plurality of planar (flat) bus bars disposed primarily in an orientation parallel to, and in close proximity to, the substrate have been utilized to provide a comparatively lower inductance. However, because of the close proximity of the bus bars to the substrate, the bus bars occupy a significant portion of the substrate area that could otherwise be allocated to additional semiconductor devices, thereby resulting in a lower current rating of the module. Therefore, such bus bar configurations make the modules inefficient and/or not suitable for, for example, higher power density and/or higher current applications. Moreover, the typical layout and assembly sequence of such bus bar configurations provide limited testing opportunities of individual components of the module (e.g., semiconductor devices, multiple devices assembled on substrates as sub-assemblies of the module, or the like).
Therefore, the inventors have developed an improved power module.